1. Field of the Invention
The present invention relates to a semiconductor device evaluation apparatus used for measuring current carried through the terminals of a semiconductor device, measuring noise leaking from a semiconductor device, evaluating a semiconductor device and such.
2. Description of the Related Art
Recently, as high-speed, high power consumption and highly integrated semiconductor devices are manufactured, demand for measuring high frequency noise outputted from the terminals of a semiconductor device rises. As an evaluation method for measuring high frequency noise and evaluating noise emission characteristics of a semiconductor device, there are proposed methods for operating a single semiconductor device and measuring noise thereof in IEC (International Electrotechnical Commission) as well as in US and European relevant industrial associations.
As a typical example of such evaluation methods, an evaluation method entitled "Electromagnetic Compatibility Measurement Procedures For Integrated Circuits-Integrated Circuit Radiated Emissions Measurement Procedure 150 kHz to 1000 MHz, TEM Cell" was made public in "IEC 47A/429/NP NEW WORK PROPOSAL, 1996.2". In addition, an evaluation method entitled "Electromagnetic Emission (EME) Measurement of Integrated Circuits, DC to 1 GHz" was made public in "IEC 47A/428/NP NEW WORK ITEM PROPOSAL, 1996.2". The former method is referred to as a first conventional method and the latter is referred to as a second conventional method, hereafter.
These evaluation methods are proposed specifications now under discussion in the IEC. In the methods, a semiconductor device is mounted on a test board, noise is measured and the noise emission characteristics of the semiconductor device is, thereby, inspected. The first conventional method is a typical example of measuring an electromagnetic field around the semiconductor device, whereas the second conventional method is a typical example of measuring noise leaking from the respective terminals of the semiconductor device.
Next, description will be given to the first conventional method. FIG. 1 is a typical view showing the structure of an evaluation apparatus for use in the first conventional method. FIG. 2 is a typical plan view showing a print-circuit board shown in FIG. 1.
As shown in FIG. 2, a semiconductor device 1401 which serves as a DUT (Device Under Test) of an evaluation target, is mounted on the surface of a print-circuit board 1303, which is referred to as a `test board`. A peripheral circuit (not shown) for operating the semiconductor device is formed on the back surface of the print-circuit board 1303. A wiring pattern 1402 is formed at the surface of the print-circuit board 1303. Each terminal 1404 of the semiconductor device 1401 is connected to the wiring pattern 1402. The other end of the wiring pattern 1402 is connected to a via hole 1403 provided in the print-circuit board 1303.
An opening portion is provided on the upper portion of a measuring unit 1301, which is referred to as `TEM Cell` (Transverse Electromagnetic Cell). As shown in FIG. 1, the print-circuit board 1303 is mounted in the opening portion. At this moment, the surface of the print-circuit board 1303, on which the semiconductor device 1401 is mounted, is directed toward the measuring unit 1301. One of the terminals of the measuring unit 1301 is terminated in a non-reflection manner by a terminating unit 1302. A spectrum analyzer 1305 is connected to the other terminal of the measuring unit 1301 through a preamplifier 1304. Then, while the influence of the peripheral circuit is being removed, the noise emitted from only the semiconductor device 1401 is measured as an electric field intensity by the spectrum analyzer 1305.
There are proposed other evaluation methods for measuring emitted noise in the vicinity of the semiconductor device 1401, as a DUT, as described above. Those methods are intended to measure the electromagnetic fields compounded in the vicinity of the semiconductor device as the intensity of the electromagnetic field and inspect the emission capability of the overall semiconductor device as in the case of the above-stated method using the measuring unit referred to as `TEM Cell`.
Next, description will be given to the second conventional method. FIG. 3 is a typical view showing an evaluation apparatus for use in the second conventional method. FIG. 4 is a typical cross-sectional view showing a POGO pin used in the second conventional method.
As shown, a semiconductor device 1501, which serves as a DUT, is mounted on the surface of an IC test board 1505 consisting of a print-circuit board. A peripheral circuit (not shown) for operating the semiconductor device 1501 is formed on the back surface of the IC test board 1505. The IC test board 1505 is attached to a main test board 1507.
Micro-strip lines 1502 and 1504 are formed on the IC test board 1505 and the main test board 1507, respectively. The micro-strip lines 1502 and 1504 are connected to each other through an impedance matching circuit 1503. A receiver (electromagnetic measuring unit) 1508 is connected to the other end of the micro-strip line 1504. An EMI (electromagnetic interference) receiver or a spectrum analyzer is utilized as the receiver 1508. The receiver 1508 normally measures voltage generated by a load of 50 .OMEGA.. Both of the test boards 1505 and 1507 are disc shaped and the micro-strip lines 1502 and 1504 radially extend from the centers of the test boards 1505 and 1507, respectively.
Normally, the IC test board 1505 and the main test board 1507 are connected by means of a sliding component referred to as POGO pin shown FIG. 4. The POGO pin is formed such that a pin contact 1602 can be slid in a socket 1601 by a spring 1603, a plate spring 1604 and such.
Conductive noise generated at the respective pins of the semiconductor device 1501, as a DUT, is measured by way of the micro-strip lines 1502 and 1504.
However, the first conventional method has disadvantage in that emitted noises from the overall print-circuit board 1303 as a test board, the wiring pattern 1402, the via hole 1403 and the terminal 1404 of the semiconductor device 1401, as a DUT, cannot be distinguished from one another.
There are some cases where the emission of electromagnetic waves resulting from the overall structure of the print-circuit board 1303 as a test board is observed. Electromagnetic waves emitted from all of these emission elements are compounded and observed as emitted noise. This makes it extremely difficult to find one of many terminals 1404 provided at the semiconductor device that emits significant noise.
In addition, the first conventional method has a disadvantage in that using the intensity of an emitted electric field as an indicator for EMI noise preventive measures is difficult. The reason is as follows. The emission capability of the semiconductor device depends on various conditions including outside dimensions and shapes of chips and lead frames on the semiconductor device, the number of pins and such. Due to the dependency, it is required to take those conditions into account when carrying out the method. However, in the TEM Cell method for measuring noise emitted from the overall semiconductor device, it is almost impossible to give consideration to the conditions of those emission elements. As a result, measurement results obtained differ in the types of the evaluation target semiconductor devices, thereby making it extremely difficult to relatively inspect them based on the measurement results.
Meanwhile, the second conventional method has a disadvantage in that it is required to conduct tests in a state under impedance conditions and such for the respective micro-strip lines, terminal conditions different from those of the ordinary operating state. The reason is as follows. In the second conventional method, conductive noises generated at the respective pins of the semiconductor device are measured. During the measurement, the noises pass through the respective micro-strip lines 1502 and 1504, the impedance matching circuit 1503 and such.
Furthermore, although the POGO pin is used as a contact, the high frequency characteristics thereof is bad. That is, when the frequency is several hundred MHz or more, the transmission characteristics of the POGO pin disadvantageously deteriorates. Besides, if power consumption becomes high, the POGO pin cannot be applied to the power source pin. Due to this, it is impossible to conduct tests in the ordinary operating state.
In addition, the second conventional method has a disadvantage in that only the voltages of the respective pins of the semiconductor device 1501 are measured. Normally, voltage largely depends on load conditions. For that reason, when the quantity of noise emitted from the print-circuit board and the cable connected to the semiconductor device is calculated, the second conventional method includes many factors which deteriorate the accuracy of estimating voltage. It is possible to relatively easily calculate the intensity of a distant, emitted electromagnetic field using a model such as a magnetic dipole moment if current is to be measured. In the IC test board method, however, current measurement accuracy is lowered.
FIG. 5 is a circuit diagram showing a conventional current detecting circuit used in the IC test board method. In the current detecting circuit used in the IC test board method, one of the two input terminals is grounded and the other thereof is connected to a first resistor 1701 and a second resistor 1703. The resistance value of the second resistor 1703 is 1.OMEGA. and the other end of the second resistor 1703 is grounded. The resistance value of the first resistor 1701 is 49 .OMEGA. and a coaxial line 1702 is connected to the other end of the first resistor 1701. The coaxial line 1702 has a resistance value of 50 .OMEGA.. Also, a decoupling capacitor 1705 is connected to the coaxial line 1702. One of the two output terminals is grounded and the other thereof is connected to the decoupling capacitor 1705.
As can be seen from the above, the conventional IC test board method employs a current detecting circuit (probe) converting input voltage to current at both ends of the second resistor 1703. Due to this, a signal passes through a type of the converting circuit, thereby deteriorating current measurement accuracy.
The problem with both the first and second conventional methods is that a measurement value largely depends on the constitution of the peripheral circuit and that of the power circuit. Normally, a peripheral circuit and a power circuit for driving a semiconductor device are provided on the back surface of the test board. Noise emitted from those circuits often adversely affect the measurement value. In addition, conditions for the connection of the semiconductor device with the peripheral circuit during tests differ from those of a case where the semiconductor device is actually used. In that case, the terminal conditions with respect to the semiconductor device are different from the conditions under which the semiconductor device is actually used. This results in the fluctuation of the measurement value to thereby cause an error in the value.
There is disclosed a magnetic field detector whose object is to be minimized (Japanese Patent Application Laid-open No. 11-72545). The magnetic field detector may be set close to a source of the magnetic field by the minimization, if there are plural sources, because influences of the other sources are reduced. The magnetic field detector disclosed in the publication has a multi-layer structure substrate, in which signal layer are sandwiched by two grand layers. A pattern which bends at two points are formed at the signal layer and a rectangular pattern which covers the pattern of the signal layer are formed at the grand layers. A crack is provided for one end of the pattern of the grand layers. The pattern of the signal layer is connected to the pattern of the grand layers at the position which the pattern of the signal layer passes the crack. The other end of the pattern of the signal layer is connected to the internal conductor of a coaxial line for signal output. The outer conductor of the coaxial line is connected to the pattern of the grand layers.